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Development of a CMOS A/D Converter for an Artificial Synapse

  • This thesis deals with background, theory, design, layout and experimental test results of an analogue CMOS VLSI current-mode analog-to-digital converter. This system supports a project, whose goal it is to build a biologically relevant model of synaptic plasticity, named the Artificial Synapse. A critical part of the design, which is based on analogue CMOS VLSI circuits, is the ability to activate a discrete number of channels by sampling an analogue signal. Since currents are the signal of interest and transistors are biased in weak inversion (subthreshold regime), the system requires a current mode A/D circuit that it can operate at ultra-low power and current levels. To meet this need, two new innovative A/D converter approaches are proposed to replace the system’s previous A/D converter design which suffered from a non-linear resolution, uncoded output code and heavy bit oscillations. The initial technical requirements and key criteria for the new converter comprise a resolution of one nano ampere, an input current range between 0 – 100nA, conversion frequencies of up to 5kHz, and a power supply voltage of less than 1.5V. Temperature range, space occupation and power dissipation aspects were not specified due to the early stage of the related Artificial Synapse project. The novel converters both produce seven bit thermometer codes, their functional principle can be best described as current mode flash analog-to-digital converters (ADCs). Due to the fact that the input signal is in the area of a subthreshold current, it is selfevident that the A/D converter design should operate at a subthreshold realm. To support low power operation, clocks or high currents could not be used and were excluded from the design from the very start. To encode the thermometer code into standard binary code, a seven-to-three encoder was designed and integrated on the chip. In October 2003, the design was submitted for production to the MOSIS circuit fabrication service. The AMI Semiconductor 1.5 micron ABN CMOS process was chosen to manufacture the chip. When it was returned in January 2004, simulation results showed that both new A/D converter approaches accomplished excellent results which were expected from SPICE simulation results. With the new chip installed, it became possible to resolve input currents as small as one nano ampere and achieve conversion frequencies of up to 5kHz. The circuits also both meet the requirements which were set at the beginning of the project to operate at a power supply voltage of less than 1.5V, processing input currents in the range between 0 – 100nA. A prototype printed circuit board (PCB) was developed, produced and employed for experiments with the chip. The major application of this test-bed is the ability to generate and measure extremely low currents with high precision. This enables the monitoring of the very small currents that are processed by the chip.

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Author:Heiko Helble
Document Type:Master's Thesis
Year of Publication:2004
Publishing Institution:HTWG Konstanz
Release Date:2004/04/30
Tag:Analog-to-digital-Converter ; Spice Simulation ; Analog integrated circuit design ;
GND Keyword:Analog-Digital-Umsetzer; SPICE <Programm>; Transistortechnologie
Institutes:Fakultät Informatik
DDC functional group:004 Informatik
Open Access?:Ja