An efficient hardware implementation of sequential stack decoding of binary block codes
- This work proposes an efficient hardware Implementation of sequential stack decoding of binary block codes. The decoder can be applied for soft input decoding for generalized concatenated (GC) codes. The GC codes are constructed from inner nested binary Bose-Chaudhuri-Hocquenghem (BCH) codes and outer Reed-Solomon (RS) codes. In order to enable soft input decoding for the inner BCH block codes, a sequential stack decoding algorithm is used.
| Author: | Jürgen FreudenbergerORCiDGND, Thomas Wegmann, Jens Spinner |
|---|---|
| DOI: | https://doi.org/10.1109/ICCE-Berlin.2015.7391215 |
| ISBN: | 978-1-4799-8748-1 |
| Parent Title (English): | IEEE 5th International Conference on Consumer Electronics - Berlin, (ICCE-Berlin), 6-9 Sept. 2015 |
| Publisher: | IEEE |
| Document Type: | Conference Proceeding |
| Language: | English |
| Year of Publication: | 2015 |
| Release Date: | 2018/03/01 |
| Tag: | Sequential decoding; BCH codes; Binary codes; Block codes; Concatenated codes |
| First Page: | 135 |
| Last Page: | 138 |
| Note: | Volltextzugriff für Hochschulangehörige via Datenbank IEEE Xplore |
| Open Access?: | Nein |
| Licence (German): |  Urheberrechtlich geschützt |
